Last updated 6/2022MP4 | Video: h264, 1280x720 | Audio: AAC, 44.1 KHzLanguage: English | Size: 1.39 GB | Duration: 4h 33m
SOC, Static Timing Analysis, Synthesis, FPGA, Logic, ECOs, HDL, Digital Design, Clock Domain Crossing, Low Power Design
What you'll learn
Access to the best and hand picked ASIC/Digital Design Interview Questions
Prepare the audience in a well rounded manner such that the candidate is extremely confident going into the interviews
Detailed explanation of the tricks used to analyze and solve the complex Logic Design Questions which can be applied across many other similar problems
Multiple ways of designing circuits with pros and cons of each to make a lasting impression on the Interviewers
Requirements
The students should have taken at least one pre-requisite Digital/ASIC Design course and should have a good understanding for Flip Flops, Logic gates, Muxes, FIFOs, Memories, Static Timing, Synthesis, DFT, etc.